Fixing vnsrl[a] operation for LMUL < 1

[Joao-Pedro-Cabral]

There are several bugs for this corner case:

• Instruction only ends after “two vreg cycles”;
• Instruction writes in the upper half of the result buffer;

Solution:

• Register Pack write at the lower half of the result buffer
• Processor Pipeline ends the instruction after “one vreg cycles”;

Depends on: #128.

[ParkerJones567]

This issue might still be present in vicuna2.0, please test with the current development branch