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pulp-platform / ManyRVData Public

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WIP: Multi-tile configuration of CachePool#10

Draft

DiyouS wants to merge 40 commits intomainpulp-platform/ManyRVData:mainfrom

dev/multi-tilepulp-platform/ManyRVData:dev/multi-tileCopy head branch name to clipboard

Conversation Commits40 (40)Checks Files changed

Draft

WIP: Multi-tile configuration of CachePool#10
DiyouS wants to merge 40 commits intomainfrom
dev/multi-tile

Commits

Commits on Jan 27, 2026

[SRC] WIP: Add multi-tile support in xbar.
DiyouS
committed
[SRC] WIP: Update pkg for multi-tile configuration.
DiyouS
committed
[SRC] WIP: Add group-level.
DiyouS
committed
[SRC] WIP: add group-level.
DiyouS
committed
WIP: [SRC] multi-tile support.
DiyouS
committed
[SRC] WIP: Move prepheral to the cluster level.
DiyouS
committed
[TB] Fix a bug in testbench of incorrectly using negedge instead of posedge.
DiyouS
committed
[SRC] WIP: Adapt package for readability, keep working on multi-tile configuration.
DiyouS
committed
[SRC] WIP: Adapt package for readability
DiyouS
committed
[SRC] WIP: continue work on multi-tile support.
DiyouS
committed
[SRC] Fix the core_id and tile_id.
DiyouS
committed
[SRC] Change hardware barrier to the new two-level hardware barrier for cachepool.
DiyouS
committed
[SW] Add software for insitu cache byte/half-word/word access test.

Aquaticfuller
authored and
DiyouS
committed
[SW] Add more info output for cache byte access test.

Aquaticfuller
authored and
DiyouS
committed
[RTL] wire byte strobes into L1 data banks

Aquaticfuller
authored and
DiyouS
committed
Update the insitu-cache dep which supports byte access.

Aquaticfuller
authored and
DiyouS
committed
[SW] Add vector byte/half-word test.

Aquaticfuller
authored and
DiyouS
committed
[SCRIPT] Update the auto-benchmark scripts: 1.add new benchmarks; 2. Fix the incorrect exit issue.

Aquaticfuller
authored and
DiyouS
committed
[Lint] Fix a line length exceeds max linting issue.

Aquaticfuller
authored and
DiyouS
committed
[SRC] WIP: connect the cross-tile interconnection.
DiyouS
committed
[SRC] Fix several warnings in simulation.
DiyouS
committed
[SRC] Fix a comb loop in multi-tile configuration.
DiyouS
committed
[SRC] Support two-tile conifguration.
DiyouS
committed
[SRC] Clean code for multi-tile support.
DiyouS
committed
[Runtime] Add tile id and number of tile functions in runtime.
DiyouS
committed
[CFG] Switch configurations to use 4 tile 16 cores by default.
DiyouS
committed
[SRC] Fix ID width mismatch and port width mismatch
DiyouS
committed
[SW] WIP: Update dotp algorithm for better performance in multi-tile configuration
DiyouS
committed
[SW] Update the multi-tile dotp kernel.
DiyouS
committed
[SW] Add optimized gemv kernel for multi-tile.
DiyouS
committed
[CI] Update CI for multi-tile support.
DiyouS
committed
[CI] Increase timeout to 5h.
DiyouS
committed

Commits on Jan 29, 2026

[Deps] Update insitu-cache dependancy.
DiyouS
committed
[CI] Remove +acc for CI flow.
DiyouS
committed
[Periph] Move memory-mapped registers outside of spatz cluster.
DiyouS
committed
[Periph] Move peripheral and bootrom outside of spatz cluster. Now fully in CachePool.
DiyouS
committed
[Periph] Remove unused registsers.
DiyouS
committed

Commits on Jan 30, 2026

[Periph] Add private partition register
DiyouS
committed
[SRC] WIP: Add cache partitioning support.
DiyouS
committed
[SW] Update load-store test.
DiyouS
committed

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