Skip to content

[PW_SID:1044970] [v2] irqchip/sifive-plic: Fix insufficient irq_groups allocation #1357

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Jump to bottom
Open
linux-riscv-bot wants to merge 1 commit into
base: workflow__riscv__fixes
Choose a base branch
from
Open

[PW_SID:1044970] [v2] irqchip/sifive-plic: Fix insufficient irq_groups allocation #1357

linux-riscv-bot wants to merge 1 commit into from

Conversation

@linux-riscv-bot
Copy link

@linux-riscv-bot linux-riscv-bot commented Jan 21, 2026

PR for series 1044970 applied to workflow__riscv__fixes

Name: [v2] irqchip/sifive-plic: Fix insufficient irq_groups allocation
URL: https://patchwork.kernel.org/project/linux-riscv/list/?series=1044970
Version: 2

@cyyself
irqchip/sifive-plic: Fix insufficient irq_groups allocation
6100cce 
Since the first irq source is 1 instead of 0, when the number of
irqs is multiple of 32, the last irq group will be ignored during
allocation, saving, and restoring. This lead to memory corruption
when accessing enable_save beyond allocated memory after commit
14ff9e5 ("irqchip/sifive-plic: Cache the interrupt enable state")
which will access enable_save for all sources during plic_probe.
Thus, we should allocate irq_groups based on (nr_irqs + 1) instead of
nr_irqs to avoid this issue.

This is an long standing bug since Linux v6.4 but since the last irq
source is rarely used, it may not be triggered in practice until commit
14ff9e5 ("irqchip/sifive-plic: Cache the interrupt enable state").

Fixes: e80f0b6 ("irqchip/irq-sifive-plic: Add syscore callbacks for hibernation")
Fixes: 4d936f1 ("irqchip/sifive-plic: Probe plic driver early for Allwinner D1 platform")
Fixes: 539d147 ("irqchip/sifive-plic: Add support for UltraRISC DP1000 PLIC")
Fixes: 14ff9e5 ("irqchip/sifive-plic: Cache the interrupt enable state")
Signed-off-by: Yangyu Chen <cyy@cyyself.name>
Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
@linux-riscv-bot
Copy link
Author

linux-riscv-bot commented Jan 21, 2026

Patch 1: "[v2] irqchip/sifive-plic: Fix insufficient irq_groups allocation"
build-rv32-defconfig
Desc: Builds riscv32 defconfig
Duration: 115.41 seconds
Result: PASS

@linux-riscv-bot
Copy link
Author

linux-riscv-bot commented Jan 21, 2026

Patch 1: "[v2] irqchip/sifive-plic: Fix insufficient irq_groups allocation"
build-rv64-clang-allmodconfig
Desc: Builds riscv64 allmodconfig with Clang, and checks for errors and added warnings
Duration: 1242.19 seconds
Result: PASS

@linux-riscv-bot
Copy link
Author

linux-riscv-bot commented Jan 21, 2026

Patch 1: "[v2] irqchip/sifive-plic: Fix insufficient irq_groups allocation"
build-rv64-gcc-allmodconfig
Desc: Builds riscv64 allmodconfig with GCC, and checks for errors and added warnings
Duration: 1709.29 seconds
Result: PASS

@linux-riscv-bot
Copy link
Author

linux-riscv-bot commented Jan 21, 2026

Patch 1: "[v2] irqchip/sifive-plic: Fix insufficient irq_groups allocation"
build-rv64-nommu-k210-defconfig
Desc: Builds riscv64 defconfig with NOMMU for K210
Duration: 25.05 seconds
Result: PASS

@linux-riscv-bot
Copy link
Author

linux-riscv-bot commented Jan 21, 2026

Patch 1: "[v2] irqchip/sifive-plic: Fix insufficient irq_groups allocation"
build-rv64-nommu-k210-virt
Desc: Builds riscv64 defconfig with NOMMU for the virt platform
Duration: 26.40 seconds
Result: PASS

@linux-riscv-bot
Copy link
Author

linux-riscv-bot commented Jan 21, 2026

Patch 1: "[v2] irqchip/sifive-plic: Fix insufficient irq_groups allocation"
checkpatch
Desc: Runs checkpatch.pl on the patch
Duration: 0.92 seconds
Result: PASS

@linux-riscv-bot
Copy link
Author

linux-riscv-bot commented Jan 21, 2026

Patch 1: "[v2] irqchip/sifive-plic: Fix insufficient irq_groups allocation"
dtb-warn-rv64
Desc: Checks for Device Tree warnings/errors
Duration: 81.25 seconds
Result: PASS

@linux-riscv-bot
Copy link
Author

linux-riscv-bot commented Jan 21, 2026

Patch 1: "[v2] irqchip/sifive-plic: Fix insufficient irq_groups allocation"
header-inline
Desc: Detects static functions without inline keyword in header files
Duration: 0.22 seconds
Result: PASS

@linux-riscv-bot
Copy link
Author

linux-riscv-bot commented Jan 21, 2026

Patch 1: "[v2] irqchip/sifive-plic: Fix insufficient irq_groups allocation"
kdoc
Desc: Detects for kdoc errors
Duration: 1.00 seconds
Result: PASS

@linux-riscv-bot
Copy link
Author

linux-riscv-bot commented Jan 21, 2026

Patch 1: "[v2] irqchip/sifive-plic: Fix insufficient irq_groups allocation"
module-param
Desc: Detect module_param changes
Duration: 0.24 seconds
Result: PASS

@linux-riscv-bot
Copy link
Author

linux-riscv-bot commented Jan 21, 2026

Patch 1: "[v2] irqchip/sifive-plic: Fix insufficient irq_groups allocation"
verify-fixes
Desc: Verifies that the Fixes: tags exist
Duration: 0.37 seconds
Result: PASS

@linux-riscv-bot
Copy link
Author

linux-riscv-bot commented Jan 21, 2026

Patch 1: "[v2] irqchip/sifive-plic: Fix insufficient irq_groups allocation"
verify-signedoff
Desc: Verifies that Signed-off-by: tags are correct
Duration: 0.29 seconds
Result: PASS

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Reviewers

No reviews

Assignees

No one assigned

Labels

None yet

Projects

None yet

Milestone

No milestone

Development

Successfully merging this pull request may close these issues.

3 participants

@linux-riscv-bot @cyyself