[PW_SID:1044694] Support for Risc-V CPUs implementing LR/SC but not AMO #1352

linux-riscv-bot · 2026-01-20T15:03:13Z

PR for series 1044694 applied to workflow__riscv__fixes

Name: Support for Risc-V CPUs implementing LR/SC but not AMO
URL: https://patchwork.kernel.org/project/linux-riscv/list/?series=1044694
Version: 2

riscv have 3 instruction set extensions related to atomic operations: - "zaamo": atomic instructions like AMOADD - "zalrsc": LR and SC instructions - "a" that is "zaamo" + "zalrsc" Historically, "a" was first, and Linux was relying on "a"; then "zaamo"/"zalrsc" was introduced. It is possible to implement most atomic operations with either AMO or LR/SC. AMO if more efficient however more complex flows are possible with LR/SC only. Platforms supporting only part of atomics starting to appear. Notable is MIPS P8700 CPU [1] having only "zalrsc". Support configurations not having "A" but supporting one of "zaamo"/"zalrsc". The "RISC-V C API" [2] defines architecture extension test macros. It says naming rule for the test macros is __riscv_<ext_name>, where <ext_name> is all lower-case. Alternative to the __riscv_a macro name, __riscv_atomic, is deprecated but used by old toolchains. Fix "-march" compiler flag and use extension test macros in code For decisions use #if defined(__riscv_atomic) || defined(__riscv_zaamo) For the full "A" support, old toolchains set __riscv_atomic while new ones set __riscv_a, __riscv_zaamo and __riscv_zalrsc Add alternative LR/SC implementations for AMO based code fragments, prefer AMO if possible and fallback to LR/SC [1] https://mips.com/products/hardware/p8700/ [2] https://github.com/riscv-non-isa/riscv-c-api-doc Suggested-by: Chao-ying Fu <cfu@wavecomp.com> Signed-off-by: Vladimir Kondratiev <vladimir.kondratiev@mobileye.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>

CPU reports extensions supported in "riscv,isa-extensions" property of the CPU node, for atomic operations it is - "a" extension meaning both AMO and LR/SC supported - "zaamo" extension meaning AMO instructions supported - "zalrsc" extension meaning LR/SC supported Code can also be compiled with subset of atomics support Relax requirements for CPU extension support from full "a" to subset compatible with software configuration Signed-off-by: Vladimir Kondratiev <vladimir.kondratiev@mobileye.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>

linux-riscv-bot · 2026-01-20T15:08:47Z

Patch 1: "[v2,1/2] riscv: support ISA extensions "zaamo" and "zalrsc""
build-rv32-defconfig
Desc: Builds riscv32 defconfig
Duration: 115.57 seconds
Result: PASS

linux-riscv-bot · 2026-01-20T15:50:19Z

Patch 1: "[v2,1/2] riscv: support ISA extensions "zaamo" and "zalrsc""
build-rv64-clang-allmodconfig
Desc: Builds riscv64 allmodconfig with Clang, and checks for errors and added warnings
Duration: 2489.38 seconds
Result: PASS

linux-riscv-bot · 2026-01-20T16:42:21Z

Patch 1: "[v2,1/2] riscv: support ISA extensions "zaamo" and "zalrsc""
build-rv64-gcc-allmodconfig
Desc: Builds riscv64 allmodconfig with GCC, and checks for errors and added warnings
Duration: 3120.19 seconds
Result: PASS

linux-riscv-bot · 2026-01-20T16:42:48Z

Patch 1: "[v2,1/2] riscv: support ISA extensions "zaamo" and "zalrsc""
build-rv64-nommu-k210-defconfig
Desc: Builds riscv64 defconfig with NOMMU for K210
Duration: 25.18 seconds
Result: PASS

linux-riscv-bot · 2026-01-20T16:43:15Z

Patch 1: "[v2,1/2] riscv: support ISA extensions "zaamo" and "zalrsc""
build-rv64-nommu-k210-virt
Desc: Builds riscv64 defconfig with NOMMU for the virt platform
Duration: 26.13 seconds
Result: PASS

linux-riscv-bot · 2026-01-20T16:43:21Z

Patch 1: "[v2,1/2] riscv: support ISA extensions "zaamo" and "zalrsc""
checkpatch
Desc: Runs checkpatch.pl on the patch
Duration: 3.60 seconds
Result: WARNING
Output:

CHECK: spaces preferred around that '*' (ctx:WxV)
#146: FILE: arch/riscv/include/asm/atomic.h:67:
+void arch_atomic##prefix##_##op(c_type i, atomic##prefix##_t *v)	\
                                                              ^

CHECK: spaces preferred around that '*' (ctx:WxV)
#180: FILE: arch/riscv/include/asm/atomic.h:135:
+					     atomic##prefix##_t *v)	\
 					                        ^

CHECK: spaces preferred around that '*' (ctx:WxV)
#194: FILE: arch/riscv/include/asm/atomic.h:149:
+c_type arch_atomic##prefix##_fetch_##op(c_type i, atomic##prefix##_t *v)	\
                                                                      ^

WARNING: Missing a blank line after declarations
#284: FILE: arch/riscv/include/asm/bitops.h:383:
+	unsigned long res, temp;
+	__asm__ __volatile__ (

CHECK: Lines should not end with a '('
#284: FILE: arch/riscv/include/asm/bitops.h:383:
+	__asm__ __volatile__ (

WARNING: unnecessary whitespace before a quoted newline
#355: FILE: arch/riscv/include/asm/futex.h:41:
+	"1:	lr.w.aqrl %[ov], %[u]			\n"	\

WARNING: unnecessary whitespace before a quoted newline
#356: FILE: arch/riscv/include/asm/futex.h:42:
+	"	" insn "				\n"	\

WARNING: unnecessary whitespace before a quoted newline
#357: FILE: arch/riscv/include/asm/futex.h:43:
+	"	sc.w.aqrl %[t], %[t], %[u]		\n"	\

WARNING: unnecessary whitespace before a quoted newline
#358: FILE: arch/riscv/include/asm/futex.h:44:
+	"	bnez %[t], 1b				\n"	\

WARNING: unnecessary whitespace before a quoted newline
#359: FILE: arch/riscv/include/asm/futex.h:45:
+	"2:						\n"	\

CHECK: spaces preferred around that '%' (ctx:WxV)
#360: FILE: arch/riscv/include/asm/futex.h:46:
+	_ASM_EXTABLE_UACCESS_ERR(1b, 2b, %[r])			\
 	                                 ^

total: 0 errors, 6 warnings, 5 checks, 374 lines checked

NOTE: For some of the reported defects, checkpatch may be able to
      mechanically convert to the typical style using --fix or --fix-inplace.

Commit a01fadd506e2 ("riscv: support ISA extensions "zaamo" and "zalrsc"") has style problems, please review.

NOTE: Ignored message types: ALLOC_SIZEOF_STRUCT CAMELCASE COMMIT_LOG_LONG_LINE GIT_COMMIT_ID MACRO_ARG_REUSE NO_AUTHOR_SIGN_OFF

NOTE: If any of the errors are false positives, please report
      them to the maintainer, see CHECKPATCH in MAINTAINERS.
total: 0 errors, 6 warnings, 5 checks, 374 lines checked
CHECK: Lines should not end with a '('
CHECK: spaces preferred around that '%' (ctx:WxV)
CHECK: spaces preferred around that '*' (ctx:WxV)
WARNING: Missing a blank line after declarations
WARNING: unnecessary whitespace before a quoted newline

linux-riscv-bot · 2026-01-20T16:44:43Z

Patch 1: "[v2,1/2] riscv: support ISA extensions "zaamo" and "zalrsc""
dtb-warn-rv64
Desc: Checks for Device Tree warnings/errors
Duration: 80.72 seconds
Result: PASS

linux-riscv-bot · 2026-01-20T16:44:45Z

Patch 1: "[v2,1/2] riscv: support ISA extensions "zaamo" and "zalrsc""
header-inline
Desc: Detects static functions without inline keyword in header files
Duration: 0.24 seconds
Result: PASS

linux-riscv-bot · 2026-01-20T16:44:48Z

Patch 1: "[v2,1/2] riscv: support ISA extensions "zaamo" and "zalrsc""
kdoc
Desc: Detects for kdoc errors
Duration: 0.99 seconds
Result: PASS

linux-riscv-bot · 2026-01-20T16:44:50Z

Patch 1: "[v2,1/2] riscv: support ISA extensions "zaamo" and "zalrsc""
module-param
Desc: Detect module_param changes
Duration: 0.27 seconds
Result: PASS

linux-riscv-bot · 2026-01-20T16:44:53Z

Patch 1: "[v2,1/2] riscv: support ISA extensions "zaamo" and "zalrsc""
verify-fixes
Desc: Verifies that the Fixes: tags exist
Duration: 0.22 seconds
Result: PASS

linux-riscv-bot · 2026-01-20T16:44:55Z

Patch 1: "[v2,1/2] riscv: support ISA extensions "zaamo" and "zalrsc""
verify-signedoff
Desc: Verifies that Signed-off-by: tags are correct
Duration: 0.35 seconds
Result: PASS

linux-riscv-bot · 2026-01-20T16:47:05Z

Patch 2: "[v2,2/2] riscv: more accurate check for CPU atomics support"
build-rv32-defconfig
Desc: Builds riscv32 defconfig
Duration: 114.58 seconds
Result: PASS

linux-riscv-bot · 2026-01-20T17:07:49Z

Patch 2: "[v2,2/2] riscv: more accurate check for CPU atomics support"
build-rv64-clang-allmodconfig
Desc: Builds riscv64 allmodconfig with Clang, and checks for errors and added warnings
Duration: 1243.06 seconds
Result: PASS

linux-riscv-bot · 2026-01-20T17:36:19Z

Patch 2: "[v2,2/2] riscv: more accurate check for CPU atomics support"
build-rv64-gcc-allmodconfig
Desc: Builds riscv64 allmodconfig with GCC, and checks for errors and added warnings
Duration: 1707.87 seconds
Result: PASS

linux-riscv-bot · 2026-01-20T17:36:45Z

Patch 2: "[v2,2/2] riscv: more accurate check for CPU atomics support"
build-rv64-nommu-k210-defconfig
Desc: Builds riscv64 defconfig with NOMMU for K210
Duration: 24.50 seconds
Result: PASS

linux-riscv-bot · 2026-01-20T17:37:13Z

Patch 2: "[v2,2/2] riscv: more accurate check for CPU atomics support"
build-rv64-nommu-k210-virt
Desc: Builds riscv64 defconfig with NOMMU for the virt platform
Duration: 26.29 seconds
Result: PASS

linux-riscv-bot · 2026-01-20T17:37:16Z

Patch 2: "[v2,2/2] riscv: more accurate check for CPU atomics support"
checkpatch
Desc: Runs checkpatch.pl on the patch
Duration: 0.82 seconds
Result: PASS

linux-riscv-bot · 2026-01-20T17:38:39Z

Patch 2: "[v2,2/2] riscv: more accurate check for CPU atomics support"
dtb-warn-rv64
Desc: Checks for Device Tree warnings/errors
Duration: 81.41 seconds
Result: PASS

linux-riscv-bot · 2026-01-20T17:38:41Z

Patch 2: "[v2,2/2] riscv: more accurate check for CPU atomics support"
header-inline
Desc: Detects static functions without inline keyword in header files
Duration: 0.23 seconds
Result: PASS

linux-riscv-bot · 2026-01-20T17:38:44Z

Patch 2: "[v2,2/2] riscv: more accurate check for CPU atomics support"
kdoc
Desc: Detects for kdoc errors
Duration: 1.00 seconds
Result: PASS

linux-riscv-bot · 2026-01-20T17:38:46Z

Patch 2: "[v2,2/2] riscv: more accurate check for CPU atomics support"
module-param
Desc: Detect module_param changes
Duration: 0.24 seconds
Result: PASS

linux-riscv-bot · 2026-01-20T17:38:48Z

Patch 2: "[v2,2/2] riscv: more accurate check for CPU atomics support"
verify-fixes
Desc: Verifies that the Fixes: tags exist
Duration: 0.22 seconds
Result: PASS

linux-riscv-bot · 2026-01-20T17:38:50Z

Patch 2: "[v2,2/2] riscv: more accurate check for CPU atomics support"
verify-signedoff
Desc: Verifies that Signed-off-by: tags are correct
Duration: 0.29 seconds
Result: PASS

Linux RISC-V bot and others added 3 commits January 19, 2026 01:14

Adding CI files

05994e3

linux-riscv-bot force-pushed the workflow__riscv__fixes branch from 05994e3 to daa8ad1 Compare January 23, 2026 09:57

[PW_SID:1044694] Support for Risc-V CPUs implementing LR/SC but not AMO #1352

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