[Deepin-Kernel-SIG] [linux 6.6-y] [Intel] Backport for i915 fixes

[opsiff]

#65
#327

Ankit Nautiyal (1):
drm/i915/display: Get bigjoiner config before dsc config during
readout

Manasi Navare (1):
drm/i915/dsc: Fix the macro that calculates DSCC_/DSCA_ PPS reg
address

Suraj Kandpal (1):
drm/i915/dsc: Fix pic_width readout

Ville Syrjälä (1):
drm/i915: Fix VLV color state readout

drivers/gpu/drm/i915/display/intel_color.c | 1 +
drivers/gpu/drm/i915/display/intel_display.c | 2 +-
drivers/gpu/drm/i915/display/intel_vdsc.c | 2 +-
drivers/gpu/drm/i915/display/intel_vdsc_regs.h | 4 ++--
4 files changed, 5 insertions(+), 4 deletions(-)

Summary by Sourcery

Backport i915 display driver fixes for DSC PPS handling, pipe configuration readout ordering, picture width calculation, and VLV color configuration.

Bug Fixes:

• Correct DSC PPS register address calculation for DSCA/DSCC blocks to match hardware layout.
• Fix pipe configuration readout ordering by obtaining bigjoiner state before DSC configuration on Haswell.
• Correct DSC picture width readout by multiplying by the number of DSC instances instead of dividing.
• Ensure VLV color state readout is wired to the generic i9xx get_config implementation.

[sourcery-ai]

Reviewer's guide (collapsed on small PRs)

Reviewer's Guide

Backports several Intel i915 display/DC fixes: corrects DSC PPS register address macros and pic_width readout, adjusts the order of bigjoiner vs. DSC state readout in pipe config, and wires VLV color state get_config so legacy color state is correctly reported.

Sequence diagram for updated pipe config readout ordering

sequenceDiagram
    participant HSW_hsw_get_pipe_config as hsw_get_pipe_config
    participant IntelBigjoiner as intel_bigjoiner_get_config
    participant IntelDsc as intel_dsc_get_config

    HSW_hsw_get_pipe_config->>IntelBigjoiner: intel_bigjoiner_get_config(pipe_config)
    IntelBigjoiner-->>HSW_hsw_get_pipe_config: update bigjoiner state in pipe_config

    HSW_hsw_get_pipe_config->>IntelDsc: intel_dsc_get_config(pipe_config)
    IntelDsc-->>HSW_hsw_get_pipe_config: update DSC state in pipe_config

    HSW_hsw_get_pipe_config-->>HSW_hsw_get_pipe_config: use updated bigjoiner and DSC state for further config readout

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Class diagram for updated VLV color funcs get_config hook

classDiagram
    class IntelColorFuncs {
        +read_luts(crtc_state)
        +lut_equal(crtc_state_a, crtc_state_b)
        +read_csc(crtc_state)
        +get_config(crtc_state)
    }

    class vlv_color_funcs {
        +read_luts = i965_read_luts
        +lut_equal = i965_lut_equal
        +read_csc = vlv_read_csc
        +get_config = i9xx_get_config
    }

    class i965_read_luts {
        +i965_read_luts(crtc_state)
    }

    class i965_lut_equal {
        +i965_lut_equal(crtc_state_a, crtc_state_b)
    }

    class vlv_read_csc {
        +vlv_read_csc(crtc_state)
    }

    class i9xx_get_config {
        +i9xx_get_config(crtc_state)
    }

    IntelColorFuncs <|.. vlv_color_funcs
    vlv_color_funcs ..> i965_read_luts
    vlv_color_funcs ..> i965_lut_equal
    vlv_color_funcs ..> vlv_read_csc
    vlv_color_funcs ..> i9xx_get_config

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File-Level Changes

Change	Details	Files
Fix DSC PPS register address calculation for DSCA/DSCC blocks to match hardware layout.	Update DSCA_PPS() macro to apply a non‑linear PPS index mapping where entries >= 12 are offset by an additional 12 Update DSCC_PPS() macro with the same PPS index mapping logic as DSCA to ensure correct register addresses	drivers/gpu/drm/i915/display/intel_vdsc_regs.h
Correct DSC picture width computation from PPS2 to reflect total width across all DSC instances.	Change pic_width extraction from dividing by num_vdsc_instances to multiplying by num_vdsc_instances when decoding PPS2 Leave pic_height readout logic unchanged	drivers/gpu/drm/i915/display/intel_vdsc.c
Ensure bigjoiner configuration is read before DSC configuration during pipe state readout.	Reorder hsw_get_pipe_config() so intel_bigjoiner_get_config() is called before intel_dsc_get_config() Keep the rest of the pipe configuration flow unchanged	drivers/gpu/drm/i915/display/intel_display.c
Hook up VLV color get_config implementation so color state is correctly reported on readout.	Add .get_config = i9xx_get_config to the vlv_color_funcs table to provide color state readout on VLV platforms	drivers/gpu/drm/i915/display/intel_color.c

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[sourcery-ai]

Hey - I've left some high level feedback:

• The DSCA_PPS/DSCC_PPS macros embed the 12 threshold and repetition of the ((pps) < 12 ? (pps) : (pps) + 12) expression; consider factoring this into a small inline helper or at least adding a brief comment to document the hardware layout and avoid the magic number.
• For the new PPS index mapping in DSCA_PPS/DSCC_PPS, consider asserting or at least documenting the valid pps range expected from callers, as out-of-range values will now silently generate arbitrary MMIO addresses.

Prompt for AI Agents

Please address the comments from this code review:

## Overall Comments
- The DSCA_PPS/DSCC_PPS macros embed the `12` threshold and repetition of the `((pps) < 12 ? (pps) : (pps) + 12)` expression; consider factoring this into a small inline helper or at least adding a brief comment to document the hardware layout and avoid the magic number.
- For the new PPS index mapping in DSCA_PPS/DSCC_PPS, consider asserting or at least documenting the valid `pps` range expected from callers, as out-of-range values will now silently generate arbitrary MMIO addresses.

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[Copilot]

Pull request overview

This PR backports four i915 display driver bug fixes from upstream to the 6.6-y kernel for Intel graphics. The fixes address critical issues in DSC (Display Stream Compression) configuration and VLV (Valleyview) color state handling that could cause incorrect hardware programming and display malfunctions.

Changes:

• Fixed DSC PPS register address calculation to account for hardware register layout gap
• Corrected DSC picture width readout to multiply instead of divide by number of VDSC instances
• Reordered bigjoiner and DSC config readout to respect dependency relationship
• Added missing VLV color state readout callback

Reviewed changes

Copilot reviewed 4 out of 4 changed files in this pull request and generated no comments.

File	Description
drivers/gpu/drm/i915/display/intel_vdsc_regs.h	Fixed DSCA_PPS and DSCC_PPS macros to account for register gap between PPS 11 and PPS 16
drivers/gpu/drm/i915/display/intel_vdsc.c	Fixed pic_width readout to multiply by num_vdsc_instances instead of dividing
drivers/gpu/drm/i915/display/intel_display.c	Reordered config readout to get bigjoiner config before DSC config
drivers/gpu/drm/i915/display/intel_color.c	Added missing get_config callback for VLV platform

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