Skip to content

[Deepin-Kernel-SIG] [linux 6.6-y] [Intel] [Backport] DMR new CPU model support #1483

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
opsiff merged 2 commits into from
Feb 9, 2026
+17 −10
Merged

[Deepin-Kernel-SIG] [linux 6.6-y] [Intel] [Backport] DMR new CPU model support #1483

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
2 commits
Select commit Hold shift + click to select a range
eaa7203
x86/cpu: Add two Intel CPU model numbers
aegl Sep 23, 2024
98aad7b
x86/cpu: Rename and move CPU model entry for Diamond Rapids
aegl Aug 11, 2025
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
5 changes: 5 additions & 0 deletions arch/x86/include/asm/intel-family.h
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -159,6 +159,9 @@
#define INTEL_FAM6_GRANITERAPIDS_D 0xAE
#define INTEL_GRANITERAPIDS_D IFM(6, 0xAE)

/* Family 19 */
#define INTEL_DIAMONDRAPIDS_X IFM(19, 0x01) /* Panther Cove */
Copy link

Copilot AI Feb 6, 2026

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Missing the INTEL_FAM19_DIAMONDRAPIDS_X definition. Following the codebase convention (see INTEL_FAM5_QUARK_X1000 at line 264), CPU model definitions for non-Family-6 processors should include both a INTEL_FAM{N}_ variant with the model number and an INTEL_ variant using IFM. Add: #define INTEL_FAM19_DIAMONDRAPIDS_X 0x01 before this line.

Copilot uses AI. Check for mistakes.

#define INTEL_BARTLETTLAKE IFM(6, 0xD7) /* Raptor Cove */

/* "Hybrid" Processors (P-Core/E-Core) */
Expand Down Expand Up @@ -193,6 +196,8 @@
#define INTEL_FAM6_LUNARLAKE_M 0xBD
#define INTEL_LUNARLAKE_M IFM(6, 0xBD)

#define INTEL_PANTHERLAKE_L IFM(6, 0xCC)
Copy link

Copilot AI Feb 6, 2026

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Missing the INTEL_FAM6_PANTHERLAKE_L definition. Following the codebase convention (see INTEL_FAM6_LUNARLAKE_M at line 196), Family 6 CPU model definitions should include both a INTEL_FAM6_ variant with the model number and an INTEL_ variant using IFM. Add: #define INTEL_FAM6_PANTHERLAKE_L 0xCC before this line.

Copilot uses AI. Check for mistakes.

/* "Small Core" Processors (Atom/E-Core) */

#define INTEL_FAM6_ATOM_BONNELL 0x1C /* Diamondville, Pineview */
Expand Down
21 changes: 11 additions & 10 deletions drivers/platform/x86/intel/speed_select_if/isst_if_common.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -802,16 +802,17 @@ EXPORT_SYMBOL_GPL(isst_if_cdev_unregister);
#define SST_MBOX_SUPPORTED 0x02

static const struct x86_cpu_id isst_cpu_ids[] = {
X86_MATCH_INTEL_FAM6_MODEL(ATOM_CRESTMONT, SST_HPM_SUPPORTED),
X86_MATCH_INTEL_FAM6_MODEL(ATOM_CRESTMONT_X, SST_HPM_SUPPORTED),
X86_MATCH_INTEL_FAM6_MODEL(ATOM_DARKMONT_X, SST_HPM_SUPPORTED),
X86_MATCH_INTEL_FAM6_MODEL(EMERALDRAPIDS_X, 0),
X86_MATCH_INTEL_FAM6_MODEL(GRANITERAPIDS_D, SST_HPM_SUPPORTED),
X86_MATCH_INTEL_FAM6_MODEL(GRANITERAPIDS_X, SST_HPM_SUPPORTED),
X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_D, 0),
X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_X, 0),
X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X, 0),
X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_X, SST_MBOX_SUPPORTED),
X86_MATCH_VFM(INTEL_ATOM_CRESTMONT, SST_HPM_SUPPORTED),
X86_MATCH_VFM(INTEL_ATOM_CRESTMONT_X, SST_HPM_SUPPORTED),
X86_MATCH_VFM(INTEL_ATOM_DARKMONT_X, SST_HPM_SUPPORTED),
X86_MATCH_VFM(INTEL_EMERALDRAPIDS_X, 0),
Copy link
Member

@opsiff opsiff Feb 9, 2026

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

These is different because of Intel SIG use old define in ("platform/x86: ISST: Add model specific loading for common module")

X86_MATCH_VFM(INTEL_GRANITERAPIDS_D, SST_HPM_SUPPORTED),
X86_MATCH_VFM(INTEL_GRANITERAPIDS_X, SST_HPM_SUPPORTED),
X86_MATCH_VFM(INTEL_ICELAKE_D, 0),
X86_MATCH_VFM(INTEL_ICELAKE_X, 0),
X86_MATCH_VFM(INTEL_DIAMONDRAPIDS_X, SST_HPM_SUPPORTED),
X86_MATCH_VFM(INTEL_SAPPHIRERAPIDS_X, 0),
X86_MATCH_VFM(INTEL_SKYLAKE_X, SST_MBOX_SUPPORTED),
{}
};
MODULE_DEVICE_TABLE(x86cpu, isst_cpu_ids);
Expand Down
1 change: 1 addition & 0 deletions drivers/platform/x86/intel/tpmi_power_domains.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -85,6 +85,7 @@ static const struct x86_cpu_id tpmi_cpu_ids[] = {
X86_MATCH_VFM(INTEL_ATOM_CRESTMONT, NULL),
X86_MATCH_VFM(INTEL_ATOM_DARKMONT_X, NULL),
X86_MATCH_VFM(INTEL_GRANITERAPIDS_D, NULL),
X86_MATCH_VFM(INTEL_DIAMONDRAPIDS_X, NULL),
{}
};
MODULE_DEVICE_TABLE(x86cpu, tpmi_cpu_ids);
Expand Down