Modelling RAM using digital electronics
              -Supervised by Prof. Pradeep Sarin, Department of Physics, IIT Bombay

Name : Ram Prakash
Roll Number : 210260042 Department :Engineering Physics Abstract: We built a 16 bit memory in the form 4 blocks of 4 bit memory. We designed a machinery of addressing these 4 blocks using a 2 bit address allotted to each memory block. A parallel input using 4 data lines is stored in a 4 bit memory block, using a D register. Data is then temporary stored there, and can be changed easily. Then data is transferred serially from this temporary memory block to those 4 bits memory blocks according to address chosen. By using this method we achieved higher speed and accuracy (by avoiding direct exposure of memory bits to inputting data) compared to traditional D-register memory blocks where data was inputted serially, where synchronisation between clock and data (inputted manually by the user) hato be taken care of. Finally, Data stored in D-register was displayed on digital display in parallel fashion. block (Cache Memory).